Formal Verification of a Novel Snooping Cache Coherence Protocol for CMP

The Chip Multiprocessor (CMP) architecture offers dramatically faster retrieval of shared data which is cached on-chip rather than in an off-chip memory. Remote cache requests are handled through a cache coherence protocol. In order to obtain the best possible performance with the CMP architecture, the cache coherence protocol must be optimized to reduce time lost during remote cache and offchip memory accesses. This paper proposes a novel snooping cache coherence protocol for CMP in which each processor has both private and shared L2 caches. The cache coherence protocol is proven by means of formal verification methods.